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Analog & Mixed Signal Circuit Design Lead

Ottawa, ON
  • Number of positions available : 1

  • To be discussed
  • Starting date : 1 position to fill as soon as possible

Category Engineering Hire Type Employee Job ID 5290 Remote Eligible Yes Date Posted 23/08/2024

Analog & Mixed Signal Circuit Design Lead

You will be part of an R&D team developing high speed analog and mixed-signal integrated circuits for DDR/LPDDR PHY, High Bandwidth Memory (HBM) PHY and Mobile Storage PHY IPs. We are looking for an engineer with theoretical knowledge and practical experience to contribute to the team. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our design environment is best-in-class with a full suite of IC design tools, supplemented by custom in-house tools, and supported by an experienced software/CAD team.

You will be part of an R&D team developing high speed analog and mixed-signal integrated circuits for DDR/LPDDR PHY, High Bandwidth Memory (HBM) PHY and Mobile Storage PHY IPs. We are looking for an engineer with theoretical knowledge and practical experience to contribute to the team. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our design environment is best-in-class with a full suite of IC design tools, supplemented by custom in-house tools, and supported by an experienced software/CAD team.

Job Responsibilities

  • Provide technical leadership and direction for a high-performing local schematic design team
  • Identify and refine circuit design to achieve optimal power, area and performance targets.
  • Propose design and verification strategies that efficiently use simulator features to ensure highest quality design.
  • Oversee physical layout to minimize the effect of parasitic, device stress, and process variation.
  • Present simulation data for peer and customer review.
  • Document design features and test plans.
  • Consult on the electrical characterization of your circuit within the IP product.

Job Requirements

  • PhD with 5+ years, or MSc with 8+ years of analog IC design experience.
  • In depth familiarity with transistor level circuit design - sound CMOS design fundamentals.
  • Experience with FinFET technologies is a plus.
  • Detailed design experience with at least one, and familiarity with several other DDR or SerDes sub-circuits: receive equalizers, samplers, voltage/current-mode drivers, serializers, de-serializers, voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, DAC
  • Aware of ESD issues (i.e. circuit techniques, layout).
  • Familiarity with custom digital design (i.e. high-speed logic paths).
  • Knowledge of design for reliability (i.e. EM, IR, aging, etc.).
  • Knowledge of layout effects (i.e. matching, reliability, proximity effects, etc.).
  • Experience with tools for schematic entry, physical layout, and design verification.
  • Hands-on experience with physical layout of high-speed circuits is a plus.
  • Knowledge of SPICE simulators and simulation methods.
  • Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.
  • Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired.
  • Good communication and documentation skills.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.


Requirements

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Work experience (years)

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