Analog Design Engineer, Sr. Staff

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You are a seasoned Analog Design Engineer with a passion for pushing the boundaries of high-speed analog design. With a solid foundation in CMOS design fundamentals, you bring a wealth of experience in SerDes/High-Speed analog design. Your deep understanding of transistor-level circuit design and silicon-proven experience in implementing circuits for TX, RX, and Clock paths within a SerDes sets you apart. You thrive in collaborative environments, working seamlessly with digital RTL engineers and mentoring junior engineers. Your expertise in optimizing FinFET CMOS layout and your awareness of ESD issues and design for reliability make you a valuable asset. You excel in using EDA tools for schematic entry, physical layout, and design verification, and your proficiency in SPICE simulators and simulation methods is unmatched. Your knowledge of Verilog-A for analog behavioral modeling and simulation-control/data-capture, along with your experience in scripting languages like TCL, Perl, C, Python, and MATLAB, further enhances your technical prowess.

• Reviewing SerDes standards and architecture documents to develop analog sub-block specifications.
• Identifying and refining circuit implementations to achieve optimal power, area, and performance targets.
• Proposing design and verification strategies that efficiently use simulator features to ensure the highest quality design.
• Overseeing physical layout to minimize the effect of parasitics, device stress, and process variation.
• Collaborating with digital RTL engineers on the development of calibration, adaptation, and control algorithms for analog circuits.
• Presenting simulation data for peer and customer review.
• Mentoring and reviewing the progress of junior engineers.
• Documenting design features and test plans.
• Consulting on the electrical characterization of your circuit within the SerDes IP product.

• Driving the development of cutting-edge SerDes IP products that set industry standards.
• Enhancing the performance and reliability of high-speed analog circuits.
• Contributing to the optimization of power, area, and performance targets in circuit designs.
• Ensuring the highest quality of designs through innovative verification strategies.
• Minimizing the impact of parasitics, device stress, and process variation in physical layouts.
• Fostering collaboration and knowledge sharing within the team and with cross-functional partners.
• Mentoring junior engineers, helping them to grow and excel in their roles.
• Providing valuable insights and data through thorough simulation and testing.
• Shaping the future of high-speed analog design through continuous innovation and improvement.

• PhD with 7+ years, or MSc with 10+ years of SerDes/High-Speed analog design experience.
• In-depth familiarity with transistor level circuit design - sound CMOS design fundamentals.
• Silicon-proven experience implementing circuits for the TX, RX, and Clock paths within a SerDes.
• Detailed design experience with several of the following SerDes sub-circuits: receive equalizers, data samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase interpolator, delay-locked loop, phase-locked loop, bandgap reference, ADC, DAC.
• Experience optimizing FinFET CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects.
• Awareness of ESD issues (i.e., circuit techniques, layout) and design for reliability (i.e., electro-migration, IR, aging, etc.).
• Experience with EDA tools for schematic entry, physical layout, and design verification.
• Knowledge of SPICE simulators and simulation methods.
• Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.
• Experience with TCL, Perl, C, Python, MATLAB.

• Innovative thinker with a passion for high-speed analog design.
• Collaborative team player who thrives in cross-functional environments.
• Mentor and leader who inspires and guides junior engineers.
• Detail-oriented engineer with a focus on quality and reliability.
• Effective communicator who can present complex data clearly and concisely.
• Problem solver with a proactive approach to overcoming design challenges.

Join a dynamic and innovative team dedicated to pushing the boundaries of high-speed analog design. Our team is focused on developing cutting-edge SerDes IP products that set industry standards. We foster a collaborative environment where knowledge sharing and continuous learning are encouraged. You will work alongside experienced engineers who are passionate about technology and committed to excellence.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.