ASIC Digital Design, Sr Staff Engineer

We’re looking for an ASIC Digital Verification Engineer to join the team. Based in our offices in Ottawa, you will be a member of the Synopsys Solutions Group team, developing interface IP solutions for memory interfaces.

You will be responsible for the development of testplans, testbench infrastructure, tests, and functional coverage to verify the functionality of training firmware running on the RTL models of the PHY. You will bring your experience and skill to our international team to enhance our strength as we continue to expand into new generations of our products and new product areas.

Interested in such a role?

Responsibilities include but not limited to the following:

• Development of testplans and functional coverage models to support the plans
• Implementation of test bench infrastructure and creation of test cases
• Contribute to technical reviews with architecture and implementation teams
• Solve complex / abstract problems with strong debugging skills
• Ability to understand standard specifications / functional specifications / feature enhancements for the product to create success path, corner case, and negative test scenarios
• Research emerging technologies in the field of virtual prototyping and emulation to drive continuous improvement for team efficiency and quality
• The role offers opportunities to mentor junior engineers to enhance ones’ leadership skills

Key Qualifications:

• BSEE with 6+ years of relevant experience in Electrical Engineering or Computer Engineering or other relevant field of study.

Preferred Experience:

• Experience working with a mixture of local and remote teams
• The ability to work independently, precisely and to drive innovation
• Proficient in SystemVerilog and UVM along with associated simulation and waveform debugging tools.
• Strong understanding of C and any software/hardware co-simulation experience would be a strong asset
• Experience developing verification solutions for productivity, performance, and throughput
• Experience with techniques such as assertion verification, coverage analysis and System Verilog for protocol-oriented performance analysis and debug
• Common linux environments and scripting for regression systems, build systems, source code control tools, etc.

• Experience with virtual prototyping and/or emulation is a plus
• Knowledge of LPDDR interfaces would be a strong asset