Analog/ Mixed Signal Layout, Staff Engineer

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You are an experienced and driven engineer with a passion for analog and mixed signal layout design. You thrive in collaborative environments and excel in project management. You have a strong technical background in physical design and are adept at communicating complex ideas to diverse teams. You are detail-oriented, highly organized, and capable of balancing multiple priorities. You have hands-on experience with advanced FinFET nodes, such as TSMC 16 nanometer and below, and are familiar with the full design cycle from RTL to GDSII.

• Owning cross-team planning, collaboration, and coordination to ensure geographically distributed teams are well-aligned.
• Measuring project and performance using appropriate systems, tools, and techniques.
• Establishing and maintaining relationships with cross-functional teams, internal and external customers.
• Creating and maintaining comprehensive project documentation.
• Collaborating closely with functional groups such as front end, analog, ASIC, CAD, and product teams globally.
• Developing full custom analog and ASIC layout of high-speed integrated circuits.

• Enhancing the efficiency and effectiveness of the physical design team through meticulous planning and coordination.
• Ensuring successful project delivery by maintaining clear and comprehensive documentation.
• Fostering strong relationships with internal and external stakeholders, ensuring alignment and satisfaction.
• Contributing to the development of cutting-edge technologies in high-speed integrated circuits.
• Facilitating the seamless integration of multiple functional groups to achieve project goals.
• Driving continuous improvement in design processes and methodologies.

• Familiarity with physical design of analog and mixed signal CMOS circuits.
• Exposure and knowledge of the full design cycle from RTL to GDSII, including chip level.
• Experience with advanced FinFET nodes, TSMC 16 nanometer and below.
• Exposure to SERDES design architectures and layout.
• Proficiency with design tools such as Custom Compiler, Cadence Virtuoso, or equivalent.
• Experience with verification tools like ICV and Calibre.
• Strong working knowledge of MS Office Suite of applications.
• Experience in working with Jira/Atlassian or other similar tools.

You are a seasoned professional with excellent communication skills and the ability to think and communicate at different levels of abstraction. You are highly organized, detail-oriented, and capable of multitasking. You are autonomous, a timely decision-maker, and able to cope with interruptions. You have a solid understanding of digital and mixed signal flows and SOC integration challenges. You typically hold an MSEE or BSEE with a minimum of 2 years of related experience, including hands-on analog layout or ASIC physical design experience.

You will be part of an advanced physical design team developing full custom analog and ASIC layout of high-speed integrated circuits. The team collaborates closely with multiple functional groups, including front end, analog, ASIC, CAD, and product teams globally. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about during the hiring process.

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