ASIC Digital Design, Architect/ Principal Engineer 8682

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Our group develops silicon IPs (PCIe/Ethernet/USB PHYs) which help customers in integrating more capabilities into an SoC-faster. Plus meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

You Are:

An experienced and visionary ASIC Verification Architect / Principal Engineer with a proven track record in delivering mixed signal IP products. You possess deep functional knowledge and expertise in verification methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of serial protocols such as PCIe/CXL/USB/Ethernet, UCIe etc. You can define and execute Testbench architecture for protocols such as PCIe/CXL. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects.

What You’ll Be Doing

• Responsible for PCIe/Ethernet next-gen Serdes PHY verification strategy and functional quality
• Creating and executing verification plans for complex mixed signal digital designs, particularly focusing on PCIe/CXL protocols.
• Utilizing advanced verification methodologies and tools to achieve high-quality results
• Mentoring and guiding other engineers, promoting best practices, and fostering a culture of continuous improvement
• Communicating with internal and external stakeholders to align on project goals and deliverables.

What You’ll Need:

• Extensive experience in mixed signal ASIC verification.
• In-depth knowledge of PCIe, CXL , UCIe and similar IO protocols.
• Proficiency in advanced digital design verification tools and methodologies.
• Strong problem-solving skills and the ability to work independently.
• Excellent communication skills for effective collaboration with diverse teams.

Who You Are:

• A mentor who fosters talent and encourages innovation.
• A proactive problem solver who thrives in complex environments.
• An effective communicator with the ability to convey technical concepts to a broad audience.
• A team player who values collaboration and diversity.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.