Senior Architect / Director, Advanced Architecture, High Speed SerDes

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

We're looking for an accomplished technical expert in SERDES design to join our team. This can be either a management or technical leadership role. Either way, it will require your brilliant expertise in High Speed SerDes.

In this role as SERDES architect, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM-modulated SERDES IP. Our team is working on 112Gbps / 224Gbps Ethernet, and PCIe6, with 400+ Gbps and PCIe7 in development. You will join an experienced analog and mixed signal R&D team where you will collaborate on innovative architectures, algorithms, and circuits to achieve best in class SERDES performance while minimizing power and area. There are numerous opportunities to collaborate globally within a world-class analog & mixed-signal design environment with leading SERDES IP experts.

You are a seasoned expert in SERDES design with a passion for pushing technological boundaries. With over 15 years of practical experience in analog IC design and SERDES system architecture, you possess an in-depth understanding of transistor-level circuit design and CMOS fundamentals. Your expertise spans various sub-circuits relevant to SERDES, such as ADCs, DACs, equalizers, comparators, and more. You thrive in a collaborative environment, working across functional domains to develop innovative solutions to complex technical challenges. Your exceptional communication skills enable you to present technical data effectively, author journal articles, and represent Synopsys at industry events. You are driven by a desire to innovate and excel, contributing to groundbreaking advancements in high-speed serial link technology.

• Reviewing SERDES standards and literature to develop novel transceiver architectures and sub-block specifications.
• Collaborating with design teams to conduct rapid studies of design issues, solutions, and trade-offs.
• Developing solutions across analog/digital/layout/hardware functional domains to address technical challenges.
• Reviewing and presenting simulation data both internally and externally.
• Authoring journal articles, technical whitepapers, and patents related to SERDES IP design innovations.
• Reviewing silicon data, proposing experiments, identifying root causes, and developing solutions.
• Representing Synopsys at technical conferences, universities, and standards bodies.
• Engaging with customers to ensure successful implementation of our SERDES IP.

• Driving innovation in high-speed SERDES IP design and development.
• Enhancing the performance, power efficiency, and area optimization of SERDES solutions.
• Contributing to the advancement of 112Gbps / 224Gbps Ethernet and PCIe6 technologies.
• Influencing industry standards and best practices through active participation in technical forums.
• Fostering collaboration within a global team of SERDES IP experts.
• Empowering customers to achieve first-time success with Synopsys' SERDES IP.

• MSc or PhD with 15+ years of experience in analog IC design and SERDES system architecture.
• Proficiency in transistor-level circuit design and CMOS fundamentals.
• Experience with sub-circuits such as ADCs, DACs, equalizers, comparators, and more.
• Knowledge of SERDES standards, fabrication, and hardware issues.
• Ability to analyze link budgets for high-speed serial links.
• Familiarity with modeling SERDES transmitters and receivers in tools like Matlab.
• Understanding of Equalization and DSP techniques used in SERDES.
• Experience with CDR architectures and CDR loop dynamics.
• Proficiency in SPICE simulators and simulation methods.
• Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB.
• Excellent communication, presentation, and documentation skills.

You are a collaborative and innovative thinker with a deep technical background in analog IC design and SERDES systems. Your expertise and passion for technology drive you to continuously seek out new challenges and solutions. You are an effective communicator, capable of presenting complex technical information clearly and engagingly. You thrive in a team environment, leveraging your skills to contribute to collective success. Your commitment to excellence and innovation sets you apart as a leader in your field.

You will join an experienced analog and mixed-signal R&D team dedicated to developing cutting-edge SERDES IP. This globally collaborative team of experts focuses on innovative architectures, algorithms, and circuits to achieve best-in-class SERDES performance. Together, we are committed to driving technological advancements and setting new standards in high-speed serial link technology.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.