Principal Design Verification Engineer

Synopsys

Nepean, ON

Number of positions available : 1
Salary To be discussed
Published on September 16th, 2024
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Starting date : 1 position to fill as soon as possible

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Description

Our Silicon Design & Verification business is all about building high-performance silicon chips-faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance-eliminating months off their project schedules.

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

ASIC Design Verification Engineer, Principal

Our DDR PHY IP team is Hiring a Principal Digital ASIC Verification Engineer.

In this role you will be responsible for developing test benches and verifying integrated IP Subsystems for our global customers. You will triage issues by working independently with architects and RTL designers while providing technical leadership on verification for initial specification to tape out.

Qualifications:

BSEE in EE with 12+ years of relevant experience or MSEE with 10+ years of relevant experience
Experience in ASIC Verification at the SOC level and block level
Exceptional Verilog, System Verilog, Perl/Python scripting, Makefile skills
Proficiency in UVM verification environment
Experience with industry tools and ability to optimize processes for verification
Solid Debugging skills and ability to root cause issues
Demonstrates good communication, problem-solving skills and can work independently
Verification experience in DDR PHY, memory subsystem is a plus